DG: Product Reliability (General DG)

A company’s reputation lives and dies with the quality of their products and it is no less true than in the semiconductor industry. As the process, design, and packaging become increasingly complicated the reliability engineer must continuously work to keep abreast on the factors that most affect reliability. Therefore, we will discuss questions such as:

Ø What intrinsic wear-out mechanism are you most concerned about?

o How is this impacted by burn-in?

o What wafer level reliability methodology is most valuable here?

Ø How confident should we be with using test site data to bridge to full product? When does this work and when should we look for more?

Ø What methodology (and associated confidence level) should be used when determining frequency/performance guardbands?

Ø For products that contain multiple RAM types (SRAM, DRAM, Flash, etc), what are the differentiating points from a reliability perspective?

Ø How should quality methodologies change depending on whether you’re selling untested wafers, tested wafers, or full BAT?

Ø What is the perceived value provided by external test / yield shops versus internal teams?

Ø What challenges will we be facing as organic package use and complexity grows? How is this impacted by application (cell phone vs. ultra high availability server)?

Ø What role do standards, such as JEDEC or MIL-SPEC, play in your qualification methodology?