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IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP
CALL FOR PAPERS |
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We invite you to submit a presentation proposal that addresses any semiconductor related reliability issue, including the following topics:
Designing-in reliability (products, circuits, systems, processes) Identification and characterization of reliability effects Deep sub-micron transistor and circuit reliability Customer product reliability requirements / manufacturer reliability tasks Root cause defects, physical mechanisms, and simulations Wafer level reliability tests, test approaches, and reliability test structures:
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Abstract submission: Your two-page extended abstract (maximum two pages including figures) should state clearly and concisely the results of your work and why they are significant. Representative data and figures that support your proposal are REQUIRED. (additional guidelines) Please e-mail your abstract to the Technical Program Chair [TP.CHAIR@IIRW.ORG] either as an MS Word document or .pdf attachment. Fax submissions will NOT be accepted. A separate cover page must include your full business address, i.e., author name, affiliation, address, telephone and fax numbers, and the e-mail address for each co-author. State whether oral or poster presentation is preferred. All submissions will be acknowledged by email within one week. If you do not receive acknowledgment of your submission, please contact the Technical Program Chair. Late paper Submission: A limited number of late breaking news manuscripts (maximum four pages) will be considered and may be submitted until September 1, 2010. Accepted late papers will be included in the Final Report. A final version of the accepted papers is due at the workshop for inclusion in the Final Report published by IEEE. The workshop offers the opportunity for expanded versions of selected workshop presentations to be part of a special IRW Proceedings Issue of the IEEE Transactions in Device and Material Reliability (TDMR) in June 2011. For more information, |