International Integrated Reliability Workshop
The IEEE International Integrated Reliability Workshop (IIRW) originated from the Wafer Level Reliability Workshop in 1982. The IIRW focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems.
Tutorials, paper presentations, poster sessions, moderated discussion groups, special interest groups, and the informal format of the technical program provide a unique environment for understanding, developing, and sharing reliability technology and test methodologies for present and future semiconductor applications as well as ample opportunity for open discussions and interactions with colleagues.
Hot reliability topics for the workshop include: SiGe and strained Si, III-V, SOI, high-k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, organic electronics, emerging memory technologies (RRAM etc.) and future "nano"-technologies, NEMS/MEMS, photovoltaics, transistor reliability including hot carriers and NBTI/PBTI, Cu interconnects and low-k dielectrics, product reliability and burn-in strategy, impact of transistor degradation on circuit reliability, reliability modeling and simulation, optoelectronics, single event upsets, as well as the traditional topics of wafer level reliability (WLR) and built-in reliability (BIR).
Registration late fee, $100, kicks in Sept.26.
Preparations of lodging/food means advance registration is desireable.
Technical Program Available (click here) rev 9/18/15
Submission site open (click here)
Richard G. Southwick III