Fallen Leaf Lake

Technical Program (Final)

Welcome, Camp Maps

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    2016 IIRW Schedule

    2016IEEE International Integrated Reliability Workshop


    SUNDAY, October 9 Pleasehave lunch before arriving at the camp; no lunch will be served at the camp.

       3:00-6:00 p.m.      Registration:Pick up badges, electronic handout, and attendee gift; Discussion Group and SIGSignup (Lodge Lounge)

    3:00-10:00 p.m.      Lodge check-in:Get room assignment (prearranged) & room key. (If physically challengedplease notify desk of special needs.)

       6:00-7:30p.m.      DINNER(Dining Room)

       7:30-8:30p.m.      Sunday Night Tutorial (Angora Room) Imaging the Antikythera Mechanism—Tom Malzbender,Malzbender Consulting

    8:30-10:00 p.m.      Social (Old Lodge)

    MONDAY, October 10

       7:00-8:00a.m.      BREAKFAST(Dining Room)

                            PlenarySession (Angora Room)

       8:00-8:10a.m.      Welcome & Introduction—General Chair: Richard Southwick, IBM

       8:10-8:20a.m.      Technical Program Overview—Tom Kopley, ON Semiconductor

       8:20-9:20a.m.      Keynote:Opportunities for 5 nm Node CMOS Technology and Beyond—Bruce Doris, IBM

                            Session#1 (Angora Room) — AdvancedCharacterization 1, Chair:Pat Lenahan, Penn State

       9:20-9:50a.m.      1.1     (INVITED) Advances in imaging and quantification of electricalproperties at the nanoscale using Scanning MicrowaveImpedance Microscopy (sMIM)—Stuart Friedman, PrimeNano Inc.

    9:50-10:20 a.m.      Coffee and SnackBreak

    10:20-11:25 a.m.    Tutorial # 1: Oxide Defects in EmergingTechnologies: Characterization and Mitigation—Dmitry Veksler,NIST

                            Session#2 (Angora Room) —Memory andCircuit Reliability, Chair:Luca Larcher, Univ. of Modena and Reggio Emilia

    11:25-11:50 a.m.    2.1     BTI variability of SRAM cells under periodicallychanging stress profiles—Kay-Uwe Giering, Fraunhofer IIS/EAS

    12:00-1:00 p.m.      LUNCH (Dining Room)

       1:00-1:05p.m.      Announcements(Angora Room)

       1:05-1:35p.m.      2.2     (INVITED) AC Stress and STD cell aging characterization to enhancereliability coverage of logic circuits—Kevin Huang, TSMC

       1:35-2:05p.m.      2.3     (INVITED) Novel characterization techniques providing reliable andlow-power Flash NOR memory operations—Jean Coignus,CEA-LETI

       2:05-2:30p.m.      2.4     The Sources of Erase VoltageVariability n Split-Gate Flash Memory Cell Arrays—Yuri Tkachev, Silicon Storage Technology

       2:30-3:10p.m.      Coffeeand Snack Break

                            Session #3 (AngoraRoom) — MEMS, Chair: Tom Kopley, ON Semiconductor

       3:10-4:45p.m.      Tutorial #2: MEMSReliability—Allyson Hartzell, Veryst Engineering

       4:50-5:10p.m.      DiscussionGroup Overview (Angora Room)

       5:10-6:00p.m.      PosterSetup (Cathedral Room), Chair: DaveEstrada, Boise State; Vice-Chair: Pat Lenahan, PennState

       6:00-7:30 p.m.      DINNER (Dining Room)

       7:30-9:00p.m.      PosterSession (Cathedral Room),Chair: Dave Estrada, Boise State; Vice-Chair: Pat Lenahan,Penn State

    9:00-10:00 p.m.      Social (Old Lodge)

    TUESDAY, October 11

       7:00-8:00a.m.      BREAKFAST(Dining Room)

       8:00-8:05a.m.      Announcements(Angora Room)

                            Session#4 (Angora Room) — Defects, Chair: Stanislav Tyaginov, TU Vienna

       8:05-8:35a.m.      4.1     (INVITED) RTN analysis as a tool to link physical devicecharacteristics to electrical reliability in nanoscaledevices—Francesco Puglisi, Univ. of Modena and Reggio Emilia

       8:35-9:00a.m.      4.2     On the distribution of theFET threshold voltage shifts due to individual charged gate oxidedefects—Gerhard Rzepa, IMEC

    9:00-10:05 a.m.      Tutorial #3: Abinitio modeling of defects in SiOx and HfO2for reliability predictions—Al-Moatasem El-Sayed, UCL

    10:05-10:35 a.m.    Coffee and Snack Break

                            Session#5 (Angora Room) — SiliconMOSFET Reliability, Chair:Steve Ramey, Intel

    10:35-11:00a.m.    5.1     Time Dependent JunctionDegradation in FinFETsTzungYu Ho, TSMC

    11:00-11:25a.m.    5.2     Layout DependentEffect: Impact on device performance and reliability in recent CMOS nodes—Cheikh Ndiaye, STMicroelectronics/IM2NP-ISEN

    11:25-12:00 p.m.   Group Picture (Flag Pole)

    12:00-1:00 p.m.      LUNCH (Dining Room)

       1:00-1:05p.m.      Announcements(Angora Room)

                            Session#6 (Angora Room) — HighVoltage Devices, Chair:Zakariae Chbili, GlobalFoundries

       1:05-2:10p.m.      Tutorial #4: SiCMOSFET Reliability – A Similar Elephant but with DifferentSpots—Kevin Matocha, Monolith Semiconductor

       2:10-2:40p.m.      6.1     (INVITED) SiC Power Device Reliability—DonGajewski, Wolfspeed/Cree

       2:40-3:10p.m.      6.2     (INVITED) Reliability of power devices—Gaudenzio Meneghesso, Univ. of Padova

       3:10-3:40p.m.      Coffeeand Snack Break

       3:40-4:10p.m.      6.3     (INVITED) The Elegant Complexity of a Simple Capacitor: Revisitingthe Reliability Physics of Thick Insulators—Asraf Alam, Purdue

       4:10-4:35p.m.      6.4     Hotcarrier degradation improvement for high voltage n-channel LDMOS in BCDtechnology—Jifa Hao, ONSemiconductor

       4:35-5:40p.m.      Tutorial #5: Process Induced Damage(PID): Challenges and Overview—Andreas Martin, Infineon

       6:00-7:30p.m.      DINNER(Dining Room)

       7:30-8:30 p.m.    Discussion Groups: Chair: Stanislav Tyaginov, TU Vienna, and Jim Lloyd, SUNY Polytech (60 minute parallel sessions for each topic.)Attendees are to participate in one of the groups.

    8:30-10:00 p.m.      Social (Old Lodge)

    WEDNESDAY, October 12

       7:00-8:00a.m.      BREAKFAST(Dining Room)

       8:00-8:05a.m.      Announcements(Angora Room)

                            Session#7 (Angora Room) — AdvancedCharacterization 2, Chair:Ricki Southwick, IBM

       8:05-8:35a.m.      7.1     (INVITED) Reliability of electronic devices: nanoscalestudies based on the conductive atomic force microscope—Mario Lanza, Suzhu U.

       8:35-9:40a.m.      Tutorial #6: Scalpel SPM toward thethree-dimensional characterization of confined volumes—Umberto Celano, IMEC

                            Session#8 (Angora Room) —Self-Heating, Chair:Gavin Hall, ON Semiconductor

    9:40-10:05 a.m.      8.1     Self-Heating Confounds,Correlates, and Redefines Front and Backend Reliability of Modern Surround GateTransistors—Ashraf Alam, Purdue

    10:05-10:30 a.m.    Coffeeand Snack Break

    10:30-10:55 a.m.    8.2     Self-Heating impact onTDDB in bulk FinFET devices: Uniform vs Non-uniform Stress—Zakariae Chbili, GlobalFoundries

                            Session#9 (Angora Room) — TDDB, Chair: Andreas Aal,Volkswagen

    10:55-11:20 a.m.    9.1     A PhysicalManifestation of Interfacial Roughness Pitfalls in Assessing Dielectric TDDBLifetimes—Lieyi Sheng, ON Semiconductor

    11:20-11:45a.m.    9.2     Fast TDDB for EarlyReliability Monitoring—Charles Larow, Gobalfoundries

    12:00-1:00 p.m.      LUNCH (Dining Room)

       1:00-6:00p.m.      Open—Theafternoon is free for discussion, hiking & other recreation. All attendees arerequired to be back before dark.

       6:00-7:30p.m.      DINNER(Dining Room)

       7:30-8:30p.m.      PosterSession (Cathedral Room),Chair: Dave Estrada, Boise State; Vice-Chair: Pat Lenahan,Penn State

       8:30-9:30 p.m.      DiscussionGroups: Chair: Stanislav Tyaginov, TU Vienna, and Jim Lloyd, SUNY Polytech (60minute parallel sessions for each topic.) Attendees are to participate in oneof the groups.

    THURSDAY, October 13

       7:00-8:00a.m.      BREAKFAST(Dining Room)

       8:00-8:05a.m.      Announcements(Angora Room)

                            Session#10 (Angora Room) — HarshEnvironments, Chair:Jean Yang-Scharlotta, JPL

       8:05-8:35a.m.      10.1   (INVITED)Automotive system level reliability dependence on semiconductor capabilitiesand market dynamics — Andreas Aal, Volkswagen

       8:35-9:05 a.m.      10.2  (INVITED) Reliability-performance evaluation for scaledmulti-materials device stacks—Gennadi Bersuker, The Aerospace Corp.

                            Session#11 (Angora Room) — Back Endof Line, Chair: JeanYang-Scharlotta, JPL

    9:05-10:10 a.m.      Tutorial #7: Scaling and VariabilityChallenges to Advance Node BEOL Reliability—Patrick Justison,Globalfoundries

    10:10-10:40 a.m.    Coffee and Snack Break /Check Out of Room

    10:40-11:05 a.m.    11.1   Effect of Texture and Elastic Anisotropy of CopperMicrostructure on Reliability—Adarsh Basavalingappa, SUNY Polytech

    11:05-11:30 a.m.    DG Summary / SIG Report / Wrap-up

    12:00-1:00 p.m.      LUNCH (Dining Room) & then the WorkshopEnds—Attendees must leave the Stanford Sierra Camp



    Poster Presentations (not including Walk-in Posters)


    Refereed Posters

    RP01               Vth is Dead –Long Live the Threshold VoltageT. Hillebrand, M. Taddiken, K. Tscherkaschin, S. Paul, and D. Peters-Drolshagen(Univ. of Bremen)

    RP02               Humidityand polarity influence on MIM PZT capacitor degradation and breakdown—J. Wang, C. Salm,E. Houwman, M. Nguyen, and J. Schmitz (Univ. of Twente)

    RP03               Reliabilityof integrated resistors and the influence of WLCSP bake S. Jose, J. Bisschop, V. Girault, L. v. Marwijk, J. Zhang,and S. Nath (NXP Semiconductors)

    RP04               ACTDDB Analysis for Circuit-Level Gate Oxide WearoutReliability AssessmentT. E.Kopley, K. OƕBrien, and W.-C. Chang (ON Semiconductor)

    RP05               1/fNoice Analysis of Hafnium Oxide based ReRAM Devices Using AC+DC Measurement Technique—N. Mahmud, A. J. Narasimham,and J. R. Lloyd (SUNY Polytechic Institute)

    RP06               IntrinsicReliability Characterization for Stand-Alone MEMS Switch Technology—E. M. Ceccarelli,J. Browne, C. Heffernan, P. Fitzgerald (AnalogDevices)

    RP07               ImprovedAnalysis of NBTI Relaxation Behavior Based on Fast I-V Measurement—D. Nouguier,G. Ghibaudo, M. Rafik, X. Federspiel, and D. Roy (STMicroelectronics/Univ. Grenoble Alpes)

    RP08               IncreasingVelocity of Wafer Level Reliability Characterization: Novel Approaches andLimitationsB. Bittel,S. Vadlamani, S. Ramey, and S. Padiyar(Intel)

    RP09               Studyof Off-State Hot-Carrier Degradation and Recovery of NMOSFET in SWD Circuits ofDRAMK. G. Kim, D. Sun, S. J. Rhe, I. G. Kim, H. Hwang, K.Y. Cho, G. Y. Jin, and I. S.Chung (Samsung/Sungkyunkwan U.)

    LN01               Onthe Effect of Interface Traps on the Carrier Distribution Function DuringHot-Carrier Degradation—S. E. Tyaginov, A. Makarov, M. Jech, J.Franco, P. Sharma, B. Kaczer, and T. Grasser (TUVienna/Ioffe Inst./IMEC)

    Open Posters

    OP01               Highand Low Volume Practices and Approaches to Semiconductor Reliability—J. Siddiqui,J. Ortega, B. Albus, and S. Hihath(DMEA)

    OP02               ReliabilityCharacterization Strategy for a Thick Copper Metallization—M. Pohl, M. Erstling,V. Hein, and P. Lammert (X-Fab)

    LN02               RadiationInduced Leakage Currents in Dense and Porous Low-k Dielectrics—R. J. Waskiewicz, M.J. Mutch, P. M. Lenahan,and S. W. King (Penn State U./Intel)

    LN03               BiasTemperature Instability and Its Correlation to Flicker (1/f) Noise in FinFETs—Y. M. Ding, K.Misra, and P. Srinivasan (NJIT/GlobalFoundries)