IIRW 2006 Keynote
Reliability Challenges: Preventing Them from Becoming Limiters to Technology Scaling
Jose Antonio Maiz
Technology and Manufacturing Group
Director, Logic Technology Quality & Reliability
technology scaling continues as projected by
In this address, an analysis of the key technology trends relevant to reliability as well as key reliability trends with a potential to slow down technology scaling will be discussed along with key concerns for some of the proposed exotic options.† This analysis will allow an exploration of the options, opportunities for research, and directions that will contribute to removing reliability as a limiter or, at a minimum, to minimize its impact.
Maiz is an Intel Fellow and Director of Logic
Technology Quality and Reliability.† He
joined Intel in 1983, and became Fellow in 2002.† Since he first joined Intel's 1 Mbit DRAM program, he has participated in the development
and reliability characterization of over 10 logic technology generations in
various individual contributor and management capacities.† He is presently responsible for
identification of silicon reliability limiters to scaling and their resolution
for Intel's next generation silicon technologies and logic products.† Maiz holds a B.Sc.
in physics from the