Fallen Leaf Lake

2018 IEEE International Integrated Reliability Workshop

2015 IIRW Schedule


SUNDAY, October 7 Please have lunch before arriving at the camp; nolunch will be served at the camp.

3:00-6:00 p.m. Registration: Pick up badges, electronic handout,and attendee gift; Discussion Group and SIG Signup (Lodge Lounge)

3:00-8:00 p.m. Lodge check-in: Get room assignment(prearranged) & room key. (If physically challenged, please notify desk ofspecial needs.)

6:00-7:30 p.m. DINNER (DiningRoom)

7:30-8:30 p.m. Sunday Night Tutorial (Angora Room) Semiconductor Reliability History JoeMcPherson, McPherson Reliability consulting

8:30-10:00p.m. Social (Old Lodge)


MONDAY, October 8

7:00-8:00a.m. BREAKFAST (Dining Room)

Plenary Session (Angora Room)

8:00-8:10 a.m. Welcome& Introduction— Luca Larcher, Univ. of Modena and Reggio Emilia

8:10-8:20 a.m. Technical Program Overview— Zakariae Chbili,GLOBALFOUNDRIES

8:20-9:20 a.m. Keynote:Universal Reliability Modeling from Defect Centric Perspective: A Pipe-Dream? — Tibor Grasser, TU Wien

Session #1 (Angora Room) — RF Reliability, Chair: Charles LaRow, Samsung

9:20-9:55a.m. 1.1 (INVITED) Considerations forHot Carrier Modeling in CMOS RF Applications— Stewart Rauch, GLOBALFOUNDRIES

9:55-10:20 a.m. Coffee and Snack Break

10:20-11:20 a.m. Tutorial#1 Training Fully Connected Networks with Non-Volatile Memories: prospectsand challenges — Stefano Ambrogio, IBM

11:20-11:55 a.m. 1.2 (INVITED) RF/DC reliability and randomtelegraph noise under the influence of a magnetic field on CMOS advancedtechnologies — Edmundo Gutierrez, Instituto Nacionalde Astrofisica, Optica yElectronica

12:00-1:00p.m. LUNCH (Dining Room)

1:00-1:05p.m. Announcements (Angora Room)

Session #2 (Angora Room) Circuit Reliability, Chair: Brad Bittel,Intel

1:05-1:30p.m. 2.1 Self-heating effects on Hotcarrier degradation and its impact on Ring-Oscillator reliability — P. Paliwoda, Z. Chbili, A. Kerber, T. Nigam, D. Singh, K. Nagahiro, P. P. Manik, S. Cimino and D. Misra, GLOBALFOUNDRIESInc and New Jersey Institute of Technology

1:30-1:40p.m. Innovative Probing solutions — K.Armendariz, Celadon Systems

1:40-2:05p.m. 2.2 New Insights on device levelTDDB at GHz Speed in advanced CMOS nodes — M. Arabi,X. Federspiel, F. Cacho, M.Rafik, A. Nguyen, X. Garrosand G. Ghibaudo, ST Microelectronics

2:05-2:30p.m. 2.3 Off-stateImpact on FDSOI Ring Oscillator Degradation under High Voltage Stress — J. Trommer, V. Havel, G. Krause, T. Chohan,G. Bossu, W. Arfaoui, A. Muehlhoff, F. Mehmood, T. Mikolajick and S. Slesazeck, Namlab gGmbH, GLOBALFOUNDRIES andTU Dresden.

2:30-2:55p.m. 2.4 FDSOI Mosfet gate dielectric breakdown Vd dependancy — X. Federspiel, M. Arabi, F. Cacho, M. Rafik and A. Cros, Namlab gGmbH,ST Microelectronics.


3:00-3:30p.m. Coffee and Snack Break

Session#3 (Angora Room)Reliability and defects, Chair: ChadwinYoung, UT Dallas

3:30-3:50p.m. (INVITED) Electron Devices Society: Activities and Opportunities –Fernando Guarin, IEEE EDS

3:50-4:25p.m. 3.1 (INVITED) Memory Reliability and Characterization — Christian Zambelli, University Ferrara

4:25-4:50 p.m. 3.2 CorrelatedDefect Creation in HfO2 films — A. Shluger and J.Strand, University College London.

4:50-5:15 p.m. 3.3 DistributionFunction Based Simulations of Hot-Carrier Degradation in Nanowire FETs — M. Vandemaele, B. Kaczer, Z. Stanojevic, S. Tyaginov, A.Makarov, A. Chasin, H. Mertens,D. Linten and G. Groeseneken,KU Leuven, imec, Global TCAD Solutions, TU Wien.

5:15-5:50 p.m. 3.4 (INVITED) RRAM reliability andCharacterization — Pragya Shrestha, NIST

5:50-6:00p.m. Discussion Group Overview (AngoraRoom)

6:00-7:30p.m. DINNER (Dining Room)

7:30-9:00p.m. Discussion Groups I-II: Chair:Gaddi Haase, SandiaNational Laboratories

9:00-10:00p.m. Social (Old Lodge)


TUESDAY, October 9

7:00-8:00a.m. BREAKFAST (Dining Room)

8:00-8:05a.m. Announcements (Angora Room)

Reliability Experts Forum (AngoraRoom)

8:05-10:00a.m. Panel #1: A review of Hot Carrier Degradation in advanced nodes — Moderator,Stanislas Tyaginov, TU Wien

10:00-10:30 a.m. Coffee and Snack Break

10:30-11:55a.m. Panel #2: A review of Time Dependent Dielectric Breakdown inadvanced nodes — Moderator, Luca Larcher, Univ.of Modena and Reggio Emilia

12:00-1:00p.m. LUNCH (Dining Room)

1:00-1:05 p.m. Announcements (Angora Room)

1:05-2:35 p.m. Panel#2 (Continued): A review of Time Dependent Dielectric Breakdown in advancednodes — Moderator, Luca Larcher, Univ. ofModena and Reggio Emilia

2:35-3:00p.m. Coffee and Snack Break

3:00-6:00p.m. Panel #3: A review of Bias Temperature Instability in advancednodes — Moderator, Jason Campbell, NIST

6:00-7:30p.m. DINNER (Dining Room)

7:30-9:00p.m. Poster Session (Cathedral Room), Chair: Pat Lenahan, Pensylvania StateUniversity. Mark Anders, NIST

9:00-10:00p.m. Social (Old Lodge)


Wednesday, October 10

7:00-8:00a.m. BREAKFAST (Dining Room)

8:00-8:05a.m. Announcements (Angora Room)

Session #4 (Angora Room)Automotive and Power devices,Chair: Matt Ring, ON semiconductors

8:05-9:05a.m. Tutorial #2: An Overview of Automotive Reliability — Andreas Aal, Volkswagen

9:05-9:30 a.m. 4.1 Voltage- and Temperature-DependentDegradation of AlN/GaN HighElectron Mobility Transistors — T. Kemmer, M. Dammann, M. Baeumler, P. Brückner, H. Konstanzer, R. Quayand O. Ambacher, FraunhoferInstitute for Applied Solid State Physics and University of Freiburg

9:30-10:05 a.m. 4.2 (INVITED) SiC power MOSFET reliability — Daniel J. Lichtenwalner, Wolfspeed

10:05-10:30a.m. Coffee and Snack Break

Session #5 (Angora Room) — FET Reliability, Chair: Suresh Uppal

10:30-10:55 a.m. 5.1 On the Impact of Metal Work-Function onBTI Charge Trapping Component — J. Franco, Z. Wu, G. Rzepa,L.-Å Ragnarsson, H. Dekkers,A. Vandooren, G. Groeseneken,N. Horiguchi, N. Collaert,D. Linten, T. Grasser, B. Kaczer,imec

10:55-11:20a.m. 5.2 Improved PBTI Reliability inJunction-less nFETs Fabricated at Low Thermal Budgetfor 3D Sequential Integration — Zhicheng Wu, JacopoFranco and Anne Vandooren, imec

11:20-11:55 a.m. 5.3 (INVITED)Time Dependent Dielectric Breakdown Universality — Ernest Wu, IBM

11:55-12:05 p.m. GROUP PICTURE

12:05-1:00p.m. LUNCH (Dining Room)

1:00-1:05p.m. Announcements (Angora Room)

1:05-6:00p.m. Open—The afternoon is free fordiscussion, hiking & other recreation. All attendees are required to beback before dark.

6:00-7:30p.m. DINNER (Dining Room)

7:30-9:00p.m. Discussion Groups III-IV:Chair: Andreas Aal, Volkswagen

Thursday, October 11

7:00-8:00a.m. BREAKFAST (Dining Room)

8:00-8:05a.m. Announcements (Angora Room)

Session #6 (Angora Room) — Defect, reliability and modeling Chair: Pat Lenahan,Pensylvania State University

8:05-8:40a.m. 6.1 (INVITED) Extraction of defect band properties — Gerhard Rzepa, TU Wien

8:40-9:15a.m. 6.2 Border Trap Based Modeling of SiC Transistor Transfer Characteristics — Stanislav Tyaginov, Markus Jech, Gerhard Rzepa, Alexander Grill, Al-Moatasem Bellah El-Sayed, Gregor Pobegen, Alexander Makarov, Tibor Grasser. Imec, TU Wien, KAIGmbH.

9:15-9:40 a.m. 6.3 Cross-Temperature Effects of Program and Read Operations in 2D and 3D NAND Flash Memories — Cristian Zambelli, Luca Crippa, Rino Micheloniand Piero Olivo, Univeristy Ferrara

9:40-10:05 a.m. 6.4Identifying Defects Responsible For Leakage Currents in Thin Dielectric Films —Ryan Waskiewicz, Elias Frantz, Patrick Lenahan, Sean King, Nicholas Harmon, Michael Flatte. The Pennsylvania State University, Intel,University of Iowa.

10:05-10:35 a.m. Coffee and Snack Break

10:35-11:00a.m. 6.5 Self-Heating Effect inSilicon-Germanium Heterostructure Bipolar Transistorsin Stress and Operating Conditions — Francesco Maria Puglisi, Marco Ghillini, Luca Larcher and Paolo Pavan, Univ. ofModena and Reggio Emilia

11:00-11:30 a.m. DGSummary / Wrap-up

12:00-1:00p.m. LUNCH (Dining Room) & then the Workshop Ends

1:00 p.m. Shuttle Bus to San Francisco International Airport leaves StanfordSierra Camp





Refereed Posters

RP01 Reliability of High Speed Photodetectorfor Silicon Photonic Applications - Fatoumata Sy, Quentin Rafhay, Carine Besset, Gaelle Beylier, Philippe Grosse, David Roy and Jean-Emmanuel Broquin, STMicroelectronics, Univ. Grenoble Alpes INP IMEP-LAHC, CEA Leti.

RP02 Multiple Modes of Electromigration Failure in SAC Solder Alloys - DeborahNoble, Matthew Ring and Jim Lloyd. SUNY Polytechnic Institute Albany, ONSemiconductor.

RP03 Gate-to-via ratio design forreliability - Tam Lyn Tan, GLOBALFOUNDRIES.

RP04 Aging Control of Power Amplifierusing Power Detector - Rania Lajmi, Florian Cacho, Vincent Knopik, Philippe Cathelin, José Lugo, Philippe Benech,Estelle Lauga Larroze,Sylvain Bourdel and Xavier Federspiel.ST Microelectronics, IMEP-LAHC Univ. Grenoble Alpes.

RP05 Gate Oxide DegradationAssessment by Electrical Stress and Capacitance Measurements - Dann Morillon, Pascal Masson, Franck Julien, Philippe Lorenzini, Jerome Goy, Clement Pribat,Olivier Gourhant, Thibault Kempf,Jean-Luc Ogier, Alexandre Villaret,Giada Ghezzi, Nathalie Cheraultand Stephan Niel, ST Microelectronics, Polytech’Lab Nice Sophia-Antipolis University.

RP06 New Physics-based Electromigration Model and Its Potential Application onDegradation Simulation for FinFET SRAM - Rui Zhang, Kexin Yang, Taizhi Liu and Linda Milor.

RP07 Investigation of the effects ofPulsed Direct Current at low frequencies on the ElectromigrationLifetime - Jennifer Passage, Sophia Rogalskyj, Nabihah Azhari and Jim Lloyd SUNYAlbany.

RP08 Process Optimization in IMDDeposition: A Successful Application of Isothermal Fast Wafer-Level Electromigration - Guanggeng Yao,Zhi Gang Han, Hin Kiong Yap, Foong Peng Yuen, Chun Pheng Tan, Pee Ya Tan and CheeWee Eng, GLOBALFOUNDRIES.

RP09 Relevance of off-state NBTI degradation in depletionHVNMOS transistor for automotive application. Marc Strasser,Stefano Aresu, Katja Puschkarsky, Roberta Stradiotto,Holger Poehle and Wolfgang Gustin,Infineon Technologies

RP10 Synaptic Behavior ofNanoscale ReRAM Devices for the Implementation in a Dynamic Neural Network Array-Karsten Beckmann, WilkieOlin-Ammentorp, Sierra Russell, Nadia Suguitan, Chris Hobbs, Martin Rodgers, Nathaniel Cady,Garrett Rose and Joseph Van Nostrand, SUNYPolytechnic Institute, Air Force Research Laboratory.

RP11 Fast Power-TemperatureCycling of BEOL test structures for Power Devices - Matthew Ring, Bill Cowell,Darren Moore and Jeff Gambino, ON Semiconductor.

RP12 Aging Investigation ofDigital Circuit using In-situ Monitor. Riddhi Shah,Florian Cacho, Rania Lajmiand Lorena Anghel, STMicroelectronics.



OP01 Lifetime Estimation Using RingOscillators for Prediction in FinFET Technology - Shu-HanHsu, Kexin Yang, Rui Zhangand Linda Milor, Georgia Institute of Technology

OP02 Live Determination of HealthState of GaN Transistors - Ayotunde Odejayi and Charles Kim, Howard University.

OP03 Burn-In Optimization for IndiumPhosphide Laser Diodes - Charles Recchia, David Woodilla, Mark Bachman and Hugh Carolan,MACOM.

OP04 A New AnalyticReliability Tool To Study Leakage Currents in Thin Films: Near Zero FieldMagneto- Resistance Spectroscopy – Elias Frants andPatrick Lenahan, ThePennsylvania State University