Fallen Leaf Lake

Tutorial Program

Jason T. Ryan

National Institute of Standards and Technology

Electron Paramagnetic Resonance: What on Earth are you Talking About?

Electron paramagnetic resonance (EPR), also commonly called electron spin resonance (ESR), is an extremely powerful analytical technique that is seemingly ubiquitous in the sciences. A simple search of EPR related literature from last year (2016) returns roughly 2600 publications spanning across almost 100 extremely diverse subject areas covering everything from evolutionary biology to fuel science and physiology to astrophysics.

 

Perhaps more pertinent for this conference, EPR spectroscopy is one of the most invaluable tools available for gaining physical insight into the identity and role that atomic-scale defects play in determining the performance and reliability of solid-state devices. However, the measurement can seem intimidating or confusing to many in our community and, as a result, is often overlooked as a tool that can help.

 

The goal of this tutorial is to show you, the intimidated or confused, that it doesn’t have to be that way.

 

After a brief history and background, I will show you that the measurement itself is relatively simple to explain and is in my opinion, a rather elegant combination of some very basic physics principles. Included in this will be some instrumentation/hardware information and other experimental notes particularly relevant for studying solid-state devices and materials. Historical examples will be discussed along with the use of EPR to solve more modern challenges. Various common embodiments of EPR (conventional, electrically-detected, non-resonant, etc.) will be explained along with their pros and cons.

 

By the end, you will have a basic understanding of EPR spectroscopy and will be much better equipped to read and interpret the solid-state EPR literature. Additionally, I’m most hopeful that I can entice you to actively seek out EPR obtained information to help solve your own material and device challenges (or perhaps initiate your own unique studies). Whatever the case may be, I think it will be enjoyable and of interest to all.

 

Dr. Ryan is a member of the technical staff and leader of the Magnetic Resonance Spectroscopy and Device Metrology Project in the Engineering Physics Division of the Physical Measurement Laboratory at the National Institute of Standards and Technology (NIST). He received the B.S. degree in Physics from Millersville University, Millersville, PA in 2004. He received the M.S. degree in Engineering Science and the Ph.D. in Materials Science and Engineering from The Pennsylvania State University, University Park, PA in 2006 and 2010, respectively. In 2010, he was awarded a National Research Council post-doctoral fellowship which he spent in the Engineering Physics Division at NIST where he is currently employed as a staff member. He has been involved in the technical and managerial committees of both the IEEE IRPS and IEEE IIRW conferences, serving as IIRW General Chair in 2015.

Scott Pozder

GLOBALFOUNDRIES

An Overview of Chip to Package Interaction and its Impact on Reliability

In the early 2000’s CPI became a major reliability topic because of the susceptibility for low-k and ultra-low-k dielectric BEOL materials to fail during chip attach to package. Now with over a decade of interconnect and package material improvements CPI remains a reliability challenge. This is due to many factors beyond the continued use of low k films as interconnect dielectric material. A few of the factors are the wide range of chip and package sizes, consequences of increasing functionality, and decreasing bump diameters to enable higher IO counts. These and other aspects of CPI and its impact on reliability will be covered in this tutorial.

Scott Pozder is a Member of Technical Staff at GlobalFoundries focusing on the measurement and prediction of CPI reliability in 7 and 14nm technologies. He is an author or coauthor on over 14 publications in the areas of 3D IC, Advanced Packaging and Cu BEOL and has 19 Issued U.S. Patents.

Ted Moise

Texas Instruments

Embedded Ferroelectric Memory – Operation, Reliability, and Applications

Ferroelectric Random-Access Memory (FRAM) features low-voltage (1.5V), fast-write operation (55ns), non-volatile data storage, and ultra-low energy usage. FRAM has applications both as a standalone memory and as an embedded memory with a microcontroller. As a result of their low energy usage, FRAM-based microcontrollers enable extended (10-year) battery-life electronics or even battery-free (i.e. energy harvesting) operation. Further, FRAM’s fast-write, high-endurance characteristics are well suited for applications that require frequent data logging or code updates. Since achieving FRAM production on the 130nm node in 2007, Texas Instruments (TI) and its partners have qualified and released hundreds of products ranging from 16kbit standalone memories to multi-Mb micro-controllers and implantable medical devices.

 

In this tutorial, the operation of ferroelectric-based memory cells and their integration into production analog CMOS processes will be summarized. Data demonstrating FRAM’s nearly-infinite (>1x1015cycles) endurance properties and high-temperature (10yr@125ºC) data retention properties will be reviewed. The primary FRAM-related reliability failure mechanisms, thermal depolarization and data imprint, will be described along with techniques to minimize the risk of failures on products. Following the reliability discussion, an overview of the applications for fast-write non-volatile memory will be presented.

 

Ted Moise earned B.S. degrees in Physics and Engineering from Trinity College, Hartford, CT, in 1987. He earned a Ph.D. degree in electrical engineering from Yale University, New Haven, CT, in 1992. Ted joined Texas Instruments in 1992, where he was responsible for the development of high-performance quantum-effect devices and circuits. In 1997, he started work on the development of scaled ferroelectric capacitors leading to the first demonstration of low-voltage, high-density, embedded ferroelectric random-access memory (FRAM). To date, Texas Instruments has shipped more than 500 million FRAM devices with applications ranging from ultra-low power medical devices to automotive event data recorders. Ted is an emeritus distinguished member of TI’s technical staff and is currently the Signal Chain Roadmap manager within TI’s Analog Technology Development organization. Ted has authored or co-authored over 70 papers, served as conference and session chair for several international technical conferences, presented numerous invited lectures, and holds 50 issued patents. Ted’s work was honored with the 2012 Edith and Peter O’Donnell Innovation Award from The Academy of Medicine, Engineering & Science of Texas (TAMEST).