Reliability Experts Forum

TDDB REF panel, Moderator: Zakariae Chbili

Zakariae Chbili

Intel Corporation, United States

Introduction to interconnect dielectric TDDB

Biography: Zakariae Chbili received the BSc degree in electrical engineering from Sidi Mohamed Ben Abdellah University, Fes, Morocco, in 2007, the MSc degree in electrical engineering from the Institut National des Sciences Appliquées, Toulouse, France, in 2008, and the PhD degree in electrical and computer engineering from George Mason University. He was with the National Institute of Standard and Technology, Gaithersburg, MD, USA as a Guest Researcher from 2010 to 2015 and with GLOBALFOUNDRIES Inc. from 2015 to 2019 where he managed the Northeast Reliability Labs. Zak is currently with Intel Corporation Folsom CA, as a Quality reliability R&D engineer in the Non Volatile Memory Solutions Group. His research interests include the reliability of emerging memory devices, reliability of advanced nodes, physics of degradation and breakdown in ultrathin gate oxides, and FinFET self-heating. Zak served as the General Chairman of IIRW 2019.

Tian Shen

IBM, United States

Scaling challenges on MOL/BEOL TDDB reliability

Biography: Tian Shen received his BSc in physics from University of Science and Technology of China, Hefei, China in 2003 and PhD in physics from the Purdue University, West Lafayette, IN, USA in 2009. He was with the National Institute of Standards and Technology, Gaithersburg, MD, USA as a guest researcher from 2010 to 2012, and GLOBALFOUNDRIES from 2012 to 2018 where he worked on semiconductor MOL/BEOL reliability issues including EM, SM and TDDB from 32 to 7nm technology nodes. He is currently with IBM research at Albany, NY, as a senior reliability engineer focusing on reliability challenges with Cu interconnect, MOL and BEOL dielectrics and emerging embedded memory. He has more than 60 journals/conferences publications in the area of semiconductor devices, materials, and physics.

Gaddi Haase

Sandia National Laboratories, United States

Can fitting of accelerated TDDB with a simple function of E predict the dielectric degradation under operating voltages?

Biography: Gaddi S. Haase received a PhD in Physical Chemistry/Surface Science from the Hebrew University of Jerusalem, Israel, in 1989. After a post-doctoral fellowship at the Microelectronics Sciences Labs at Columbia University in NYC, followed by another post-doctoral research at the Physical Chemistry Dept. in the University of Wisconsin, Madison, he became a professor at the Chemical Physics Dept. in the Weizmann Institute of Science in Israel. His work centered around atomically-resolved photovoltage imaging around defects, or single adsorbed atoms or molecules on semiconductor surfaces, using STM in UHV. In 2001, Gaddi moved to Texas Instruments, where he engaged in process development and novel materials reliability research. He then moved to Molecular Imprints, (nano-imprint lithography) and later joined the Microsystems Science and Technology center at Sandia National Laboratories in 2011. Gaddi has over 45 peer reviewed publication and 4 patents.

Kristof Croes

imec, Belgium

Dielectric breakdown studies of scaled copper interconnects: Challenges and opportunities

Biography: Kristof Croes has an MSc in physics and biostatistics and he also obtained a PhD concerning the development of statistical techniques for planning reliability experiments. After that, he joined the reliability business unit of XPEQT as the manager of the R&D. From 2003 till end 2006, he was product and application manager of the package level reliability products of the Singaporean based company Chiron holdings. Beginning 2007, he went back to research, working as a BEOL reliability engineer in imec. Currently, he is group leader of the Reliability, Electrical test and Modeling group working on test, characterization (electrical, thermal and (thermo)-mechanical) and reliability with main focus on advanced interconnects (2D, 3D, OIO). Kristof was an (invited/tutorial) speaker at several leading edge semi-conductor conferences (IRPS, IITC, IEDM,). He also (co)-authored >100 papers in the field of reliability.

Andrew Kim

Intel Corporation, United States

Thickness-variation-cognizant TDDB stress method, TDDB model validation requirements, RVS (Ramped Voltage Stress)/RCS (Ramped Current Stress) methods for TDDB, and modeling of intrinsic/extrinsic TDDB to product HTOL

Biography: Andrew Kim is a CMOS reliability R/D engineer at NSG (Non-volatile memory Solutions Group) of Intel Corporation, Folsom, CA. His current focus is BEOL reliability (EM, TDDB, SM and Thermal Cycle) of Cu interconnects and research in intrinsic/extrinsic TDDB modeling from devices to product HTOL. He served as a chair/vice-chair of Dielectric Committee of IRPS 2019 and 2018. Since 1998, he has been working on semiconductor interconnect reliability, BEOL process integration, eFuse design, TCAD on strained silicon, CMP modeling at various companies, and gas turbine design and system reliability at General Electric, Schenectady, NY. He received a BSc with a minor in mathematics in 1995 from California State University, Fullerton, CA, MSc and PhD, respectively in 1996 and 2001, from Rensselaer Polytechnic Institute, Troy, NY, all in Mechanical Engineering.

Electromigration REF panel, Moderator: James Lloyd

James Lloyd

SUNY Polytechnic Institute, United States

Introduction

Biography: Over 50 years experience in reliability physics, concentrating on back end conductors and dielectrics. From IBM, Digital Equipment Corporation, Max-Planck-Institut, Jet Propulsion Laboratory and now SUNY Polytechnic Institute, Dr. Lloyd has made many contributions to the understanding of metallization and TDDB related reliability. He is now active in education and continuing research into these important issues.

Baozhen Li

IBM, United States

EM reliability for advanced Cu

Biography: Baozhen Li is a Senior Technical Staff Member (STSM) at IBM Systems. He has been working on technology reliability for more than 20 years. His experiences cover a wide range of reliability aspects, including electromigration (EM), stress migration (SM), dielectric breakdown (TDDB), thermal mechanical stability and chip-package interactions (CPI). In addition to reliability studies for leading edge semiconductor technology development, he also works on reliability design optimization and chip level reliability for high end computing systems. He publishes and patents extensively in the semiconductor technology and reliability area. He has given multiple tutorials and invited talks at international conferences and wrote multiple invited introductory papers in journals. He received a bachelor’s degree from Northeastern University in China and PhD degree from the University of Notre Dame in USA.

Jeff Gambino

ON Semiconductor, United States

Electromigration issues in more-than-Moore devices

Biography: Dr. Gambino received the BSc degree in materials science from Cornell University, Ithaca, NY, in 1979, and the PhD degree in materials science from the Massachusetts Institute of Technology, Cambridge, MA, in 1984. He joined IBM, Hopewell Junction, NY, in 1984, where he worked on silicide processes for Bipolar and CMOS devices. In 1992, he joined the DRAM development alliance at IBM's Advanced Semiconductor Technology Center, Hopewell Junction, NY. While there, he developed contact and interconnect processes for 0.25-, 0.175-, and 0.15-um DRAM products. In 1999, he joined IBM's manufacturing organization in Essex Junction, VT, where he worked on copper interconnects, CMOS image sensors, RF devices, and 3D integration. He joined ON Semiconductor, Gresham, OR, in 2015. He is currently working on CMOS image sensors and high voltage semiconductors. He has published over 200 technical papers and holds over 500 patents.

Lado Filipovic

Technische Universität Wien, Austria

Modeling the impact of microstructure on electromigration

Biography: Lado Filipovic is an Assistant Professor of Modeling and Simulation of Integrated Semiconductor Sensors at TU Wien in Vienna, Austria. He obtained his Master’s degree in Applied Sciences (MASc) from Carleton University, in Ottawa, Canada (2009), and his doctoral degree (Dr.techn.) in Microelectronics (2012) and venia docendi (habilitation) in Semiconductor Based Integrated Sensors (2020) from the TU Wien. He has edited a book on Miniaturized Transistors and has reviewed for many leading journals on the topic of Microelectronic Devices and Processes, Sensors, and Reliability. He is also an active member of the Technical Program Committee for outstanding IEEE sponsored conferences, such as IEEE Sensors and SISPAD. He has been a Principal Investigator in various research projects funded by, e.g., the EU FP7 and Horizon 2020 programs and the Austrian Research Promotion Agency (FFG). His primary research interests are studying the operation, stability, and reliability of back end of line (BEOL) metallization and through-silicon vias (TSVs), as well as novel semiconductor-based sensors, using advanced process and device TCAD approaches. He is currently investigating the inclusion of microstructure in the modeling of electromigration phenomena in copper interconnects. Furthermore, with his team he is studying metal oxide semiconductors and two-dimensional materials, e.g., graphene and MoS2, for the detection of environmental pollutants and biomarkers from exhaled breath.

King-Ning Tu

National Chiao Tung University, Taiwan

Mean-time-to-failure equations for electromigration, thermomigration, and stress-migration based on entropy production

Biography: King-Ning Tu received his PhD degree in Applied Physics from Harvard University in 1968. He spent 25 years at IBM T. J. Watson Research Center as Research Staff Member in Physical Science Department. In July 1993, he joined UCLA. He was Distinguished Professor in Dept. of Materials Science and Engineering and also Dept. of Electrical Engineering at UCLA until June 2016. He is now E. Sun scholar and TSMC Chair Professor in National Chiao Tung University in Hsinchu. He is a Fellow of APS, TMS, MRS, and an Overseas Fellow of Churchill College, Cambridge University, UK. He was president of MRS in 1981. He received the 2013 John Bardeen Award of TMS EMPM Division, and 2017 IEEE Components, Packaging, and Manufacturing Technology Award. He is an academician of Academia Sinica. He has over 500 journal publications with citation over 24,000 and h-factor of 78. His textbook on “Electronic Thin Film Reliability” was published by Cambridge University Press in 2011. He co-authored the textbook on “Kinetics in Nanoscale Materials” published by Wiley in 2014. His research specialties are in metal-silicon reactions, solder joint reactions, electromigration, and kinetic theories of interfacial reactions.

Valeriy Sukharev

Mentor, A Siemens Business, United States

Multiphysics EM simulations from a single-link via-line-via segment to on-chip power/ground grid

Biography: Valeriy Sukharev is a Technical Lead at the Design to Silicon Division (Calibre) of Mentor, a Siemens Business. He is a holder of the PhD degree in physical chemistry from the Russian Academy of sciences. Prior to Mentor Graphics, Dr. Sukharev was a Chief Scientist with Ponte Solutions, Inc., a Visiting Professor with Brown University, and a Guest Researcher with NIST, Gaithersburg, MD. He also held senior technical positions with LSI Logic Advanced Development Lab. Dr. Sukharev’s major research activity is in development of new full-chip modeling and simulation capabilities for the EDA, semiconductor processing and reliability management. He has authored/co-authored more than 140 publications in scientific journals and conference proceedings and holds 20 plus U.S. patents. He has co-edited 2 books and co-authored one. He serves on the Editorial Boards and technical/steering committees of a number of profiling journals and conferences. He was a recipient of the 2014 & 2018 Mahboob Khan Outstanding Industry Liaison/Associate Award (SRC) and the best paper awards from ICCAD 2016 & 2019.

Kirsten Weide-Zaage

Gottfried Wilhelm Leibniz Universität, Germany

Metallization under harsh environment stress effects

Biography: Kirsten Weide-Zaage extraordinary Professor and leader of the RESRI group at the Institut of Microlectronics, Faculty of Electrical Electrical Engineering and Computer Science of the Gottfried Wilhelm Leibniz Universität in Hannover, Germany. Her main research activities are in the field of microelectronic reliability. Focus is on static and dynamical thermal-electrical-mechanical effects in Interconnects, Packages and on Boards. Furthermore Corrosion Effects, Radiation and TCAD-Simuations.

Stress Migration REF panel, Moderator: Matthew Hogan

Matthew Hogan

Mentor, A Siemens Business, United States

Introduction

Biography: Matthew Hogan is a Product Management Director for Calibre Design Solutions at Mentor, a Siemens Business, with over 2 decades of design, field and product development experience. He is actively working with customers who have an interest in Calibre® PERC™ or reliability verification. Matthew is an active member of the International Integrated Reliability Workshop (IIRW), has previously been on the Board of Directors for the ESD Association (ESDA), contributes to multiple working groups for the ESDA and is a past general chair of the International Electrostatic Discharge Workshop (IEW). Matthew is also a Senior Member of IEEE, and a member of ACM. He holds a BEng from the Royal Melbourne Institute of Technology, and an MBA from Marylhurst University.

Ennis Ogawa


Stress migration up to the era of advanced hybrid metallization stacks

Biography: Ennis Ogawa has been actively involved with BEOL reliability concerns since 1995 or so, starting with Cu EM and low-k research done as a postdoctoral fellow at the University of Texas, Austin. He moved to Texas Instruments in 2001 and worked primarily on BEOL reliability concerns in advanced technologies until 2007. In 2007, he started work at Broadcom Corporation, where he covered a wide range of reliability concerns from process reliability, design-for-reliability, process and device reliability specification, and product reliability issues involving BEOL, far-Backend, Front-end devices and processes, and Packaging across a variety of process technology nodes. Since 2016, he has worked at a startup as Associate Technical Director – covering a wide range of reliability concerns – where he continues to survive today. Ennis has been actively involved with industry-level reliability concerns including technical contributions to SRC (Semiconductor Research Corporation), Sematech, JEDEC standardization and reliability conferences such as IRPS, IIRW, AMC, IITC, etc. and serving on technical and/or management committees at IRPS and IIRW. He has also published extensively in areas involving semiconductor reliability across a variety of topics including SM/SIV.

Scott Martin

Texas Instruments, United States

Stress migration: Characterization and empirical observations

Biography: Scott Martin is Product Reliability Engineer at Texas instruments, which means integrating quality and reliability into new technologies and products. More recently, his efforts have focused on design reliability for technologies that target automotive and industrial markets. He holds a PhD in physical chemistry from the University of Notre Dame and began his career at Texas Instruments in 1998, where he initially worked on CMOS process development of TI’s Copper / LowK interconnect technologies.

Gavin D.R. Hall

ON Semiconductor, United States

Thermomechanical effects in microelectronic metallization

Biography: Gavin D.R. Hall has been working in the areas of semiconductor research, development and manufacturing since 2002, and has held professional positions in Process Integration at LSI Logic before joining ON Semiconductor as a Device Engineer in 2007. Since 2011, his work in Technology Development has contributed to the qualification of multiple automotive and consumer technologies, through the creation and management of a device development lab enabling diagnostic testing and modeling for early reliability and performance evaluations. He attained the Certified Reliability Engineer (CRE, ASQ) in 2012, has served on the IEEE International Reliability Physics Symposium (IRPS) technical program committee since 2015, and has published several papers in IEEE on SM/SIV.