4-8 October 2020
Welcome to IIRW
The IEEE International Integrated Reliability Workshop (IIRW) originated from the Wafer Level Reliability Workshop in 1982. The IIRW focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems.
Tutorials, paper presentations, poster sessions, moderated discussion groups, special interest groups, and the informal format of the technical program provide a unique environment for understanding, developing, and sharing reliability technology and test methodologies for present and future semiconductor applications as well as ample opportunity for open discussions and interactions with colleagues.
We invite you to submit a presentation proposal that addresses any semiconductor related reliability issue, including the following topics:
- Gate/Interconnect dielectrics (high-k, SiO2, SiON, low-k)
- Conventional and emerging memory devices (RRAM, etc.)
- FinFET, SOI, FDSOI, non-CMOS (III-V), and novel devices
- Emerging technologies and devices (2D materials, IGZO, etc)
- Power and wide bandgap (SiC, GaN, etc.) device reliability
- Transistor reliability (hot carriers, NBTI/PBTI, TDDB)
- Modeling and simulation of reliability issues
- Impact of transistor degradation on circuit reliability
- Designing-in reliability (products, circuits, systems, processes)
- Customer product reliability requirements / manufacturer reliability tasks
- Wafer level reliability tests, test approaches, and reliability test structures