9-14 October 2022

Stanford Sierra Conference Center

Fallen Leaf Lake, CA, USA

Welcome to IIRW

The IEEE International Integrated Reliability Workshop (IIRW) originated from the Wafer Level Reliability Workshop in 1982. The IIRW focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems.

Tutorials, paper presentations, poster sessions, moderated discussion groups, special interest groups, and the informal format of the technical program provide a unique environment for understanding, developing, and sharing reliability technology and test methodologies for present and future semiconductor applications as well as ample opportunity for open discussions and interactions with colleagues.

IIRW 2021 Best student paper

"Understanding the Reliability of Ferroelectric Tunnel Junction Operations using an Advanced Small-Signal Model" by Lorenzo Benatti

Important Dates

Regular Abstract Deadline: July 9, 2022

Author Notification: August 31, 2022

Late News Deadline: September 10, 2022

Contacts

General Chair: Matthew Hogan gc.iirw@gmail.com

Technical Program Chair: Francesco Maria Puglisi tpc.iirw@gmail.com

Scope

The IIRW technical program and management committee invites abstracts related to the many areas of semiconductor reliability, such as:

  • FOCUS AREA: Circuit reliability, device-circuit degradation, aging

  • FOCUS AREA: In-memory computing and neuromorphic reliability

  • FOCUS AREA: Plasma-induced damage, electrostatic discharge

  • FEOL/MOL/BEOL dielectrics (high-k, SiO 2 , SiON, low-k)

  • FET, FinFET, SOI, III-V, SiGe reliability (HC, BTI, TDDB, RTN, etc.)

  • Conventional and emerging memories (Flash, RRAM, etc.)

  • Emerging technologies and devices (2D materials, IGZO, etc.)

  • Power, wide-bandgap (SiC, GaN, etc.) devices reliability and circuits reliability

  • RF and mm/sub-mm Wave devices reliability and circuits reliability

  • Modeling and simulation of reliability, including self-heating

  • Process integration reliability

  • Failure analysis and advanced packaging reliability

  • Impact of devices degradation on circuit reliability

  • Design-in-reliability (products, circuits, systems, processes)

  • Advanced automotive circuits, systems, products reliability

  • Customer/manufacturer product reliability requirements

  • Wafer-level reliability tests for monitoring and qualification

Sponsors

Patrons