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Reliability Experts Forum Panelists
Peter Moens
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Peter Moens received a Master in nuclear physics and a Ph.D. in solid state physics from the University of Gent, Belgium, in 1990 and 1993 respectively. At onsemi is working on SiC MOSFETs. He is/was a member of the technical program committees of IEDM, ISPSD, IRPS, CSMANTECH, ICSCRM, IRW, EDTM, ESSDERC and ESREF. He was the General chair of ISPSD 2012. He authored and co-authored over 200 publications in peer reviewed journals or conferences, 20 invited papers, and is the recipient of 6 best paper awards (including 2 ISPSD best paper awards as first author). He presented tutorials at IRPS, ISPSD and EDTM. He is an inductee of the ISPSD International Hall of Fame. He holds 62 US patents.
Peter Moens
onsemi Power Solutions Group, Belgium
Sandeep Bahl
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Sandeep Bahl is a recognized leader in semiconductor technologies. He co-founded TI’s GaN product line and co-invented TI’s direct-drive GaN architecture. He is presently focusing on the ramp and acceleration of GaN technology, to bring reliable power electronics products to market. Since traditional reliability testing does not cover use cases of power electronics, he has developed methodologies to know that GaN products will be reliable in all kinds of applications. He works with customers to understand their use-cases, assesses the operational impact of the system-level stresses on devices, and drives efforts across technology teams to assure high-quality parts. Sandeep also played a key role in the GaN industry standardization effort, which led to the formation of the JEDEC JC70 committee and the increasing market adoption of GaN. He serves as co-chair of the JC70 GaN reliability task group and led the first JEDEC GaN reliability guideline, JEP180. Sandeep has a PhD from MIT and is a distinguished member of technical staff at TI.
Sandeep Bahl
Texas Instruments
Yuji Zhao
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Dr. Yuji Zhao is a Professor of Electrical and Computer Engineering at Rice University, where he leads the Wide-bandgap Innovative Device Engineering (WIDE) Lab. He received his Ph.D. from the University of California, Santa Barbara in 2012 under the supervision of Nobel Laureate Professor Shuji Nakamura. His research focuses on electronic materials, advanced semiconductor devices, and nanotechnologies, with particular emphasis on diamond, boron nitride (BN), and other wide- and ultrawide-bandgap semiconductors for energy-efficient power electronics, thermal management, and quantum photonics. He has co-authored 5 book chapters, more than 290 journal papers and conference presentations, and over 20 patents. His honors include the 2019 U.S. Presidential PECASE Award, the 2023 TMS Frontiers of Materials Award, the 2019 MIT TR 35 Award, and early-career awards from NASA and the DTRA.
Yuji Zhao
Rice University
Kevin Seaton
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Kevin Seaton is an Advising Engineer at VPT, Inc. Holding a Master’s in Electrical Engineering from the Georgia Institute of Technology, he leverages 25 years of power electronics design experience to deliver integrated solutions for high-reliability environments. In his leadership role, Kevin strategically guides VPT's comprehensive product roadmap, spearheading technical innovation for both Space and Non-Space applications within the aerospace and defense sectors.
Kevin Seaton
VPT, Inc.
Boris Butej
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Boris Butej received the M.Sc. degree in Technical Physics from Graz University of Technology (TU Graz) in 2021 and the Ph.D. degree in Electrical Engineering from Vienna University of Technology (TU Wien) in 2026. Since 2024, he has been with KAI GmbH in Villach, a fully owned subsidiary of Infineon Technologies Austria AG, where he works as a device reliability engineer in the Device Physics group focusing on GaN power devices. His research interests include the characterization, reliability, and modeling of wide bandgap semiconductors, particularly GaN HEMTs and p GaN gate technologies. During his Ph.D., he investigated dynamic drift effects and developed a comprehensive GaN on Si buffer charging model, establishing him as a key expert in Infineon’s GaN characterization community. He has published journal and conference papers and regularly attends international conferences.
Boris Butej
KAI Kompetenzzentrum Automobil- und Industrieelektronik GmbH
Jeff Gambino
Panel: Wide Bandgap Reliability for Power and RF Applications Panel
Jeff Gambino, Ph.D. has been with onsemi, Gresham, OR, since 2015. He is currently working on CMOS image sensors and high voltage semiconductors.
Prior to joining onsemi, Jeff was a staff engineer at IBM. During his 31 years at IBM, Jeff developed silicide processes, contact and interconnect processes for 0.25-, 0.175-, and 0.15-um DRAM products, and processes for copper interconnects, CMOS image sensors, RF devices, and 3D integration.
Jeff received a B.S. degree in materials science from Cornell University, Ithaca, NY, in 1979, and the PhD degree in materials science from the Massachusetts Institute of Technology, Cambridge, MA, in 1984. He has published over 200 technical papers and has 585 patents.
Jeff Gambino
onsemi
Dr. Preeti Chauhan
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Dr. Preeti Chauhan is a Technical Program Manager (TPM) at Google, leading strategic and transformational initiatives in AI/ML hardware within the Data Center Quality and Reliability group. She leverages her expertise to drive improvements in data center quality, reliability, and deployment speed at Google's massive scale. Her extensive experience encompasses quality and reliability leadership for cutting-edge technologies like Intel's Foveros 3D packaging and server microprocessors. Actively engaged within the engineering community, she serves as a senior member of the Institute of Electrical and Electronics Engineers (IEEE) and co-edits the data column in the prestigious Computer magazine. Dr. Chauhan is currently serving as the 2025 Vice President for Meetings and Conferences within the IEEE Reliability Society and as a liaison to the IRPS Board of Directors.
Dr. Preeti Chauhan
Jeffrey Hicks
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Jeffrey Hicks is an Intel Senior Fellow and Director of Technology Reliability Pathfinding. He oversees Intel’s reliability strategy across a range of disciplines, leading programs and functions to address complex inter-disciplinary challenges spanning silicon technology, packaging, manufacturing, and product design and architecture. He is dedicated to making reliability a driving force in the advance of digital technologies through innovation within Intel and the broader ecosystem in collaboration with customers and other external partners. Mr. Hicks has worked at Intel since 1980 across a wide range of Quality and Reliability functions. He received a B.S. degree in applied physics from the California Institute of Technology, has published over two dozen technical papers and holds several patents.
Jeffrey Hicks
Intel
Prof. Souvik Mahapatra
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Souvik Mahapatra is a professor of electrical engineering at Indian Institute of Technology (IIT) Bombay, Mumbai, India. He works in the area of CMOS logic device / circuit and NAND flash memory reliability, and has close collaborations with several semiconductor industries in the IDM, fab, fabless, fab-tool and EDA space. He has published more than 200 articles in peer reviewed journals and conferences, and 22 book chapters, and has delivered invited talks and tutorials at several major international conferences. He is a fellow of IEEE and several Indian science and engineering academies (INSA, INAE and IASc). His work got recognition with a named model (Mahapatra Reliability Model) that is available in Sentaurus Device simulator from Synopsys, and is being used by the semiconductor industry. He is the technical co-founder of Relsym, a startup incubated in IIT Bombay, having the goal of translating academic research into software tools for device and circuit reliability.
Prof. Souvik Mahapatra
IIT Bombay
Stanislav Tyaginov
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Dr. Stanislav Tyaginov received his PhD degree in physics at the Ioffe Physical-Technical Institute in 2006. Starting from 2008 he has been working at the Technical University of Vienna where he led the physics-based hot-carrier degradation model development group. For the period of 2018-2020 he was a Marie Curie postdoctoral fellow at imec, where he is currently employed as a principal researcher. Dr. Tyaginov has been serving as a technical program committee member at the IIRW (2020 general chair), IRPS, ESREF, IPFA, EDTM and has authored/co-authored more than 150 publications in peer reviewed scientific journals as well as in conference proceedings. Among them, more than 60 are journal papers. His scientific interests include HCD, BTI, TDDB, self-heating in Si, SiGe/Ge, 2D channel material based and SiC devices, as well as tunneling phenomena.
Stanislav Tyaginov
imec
Limor Zohar
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Limor Zohar is a Principal Product Quality and Reliability Engineer at Arm with extensive experience in semiconductor reliability, failure analysis, and device physics. Her work spans the connection between device-level reliability mechanisms and their impact on product and system-level reliability.
She has authored publications in the field of RF reliability, focusing on reliability mechanisms and their impact on semiconductor device performance. At Arm, her work focuses on quality and reliability across increasingly complex compute systems, including the use of pre-silicon insights, failure analysis, and field data to identify reliability risks, enable earlier prediction of failures, and increase uninterrupted system operating time.
Limor Zohar
Arm
Rohit Grover
Panel: Advance Node Device Reliability & Implications to System Level Reliability
Rohit Grover is a semiconductor reliability leader with over 20 years of experience spanning CMOS process integration, quality and reliability engineering, early life failure modeling, and yield engineering. He currently serves as the Director of Product Quality Engineering at AMD, where he oversees pre silicon reliability assessment methodologies and early life failure rate projections for next generation products. His organization’s scope extends from silicon level defect physics through package and system level DPPM achievement, supporting both chiplet based architectures and monolithic designs.
Rohit holds a PhD and MS in Electrical and Computer Engineering from the University of Maryland and a BTech in Engineering Physics from IIT Bombay. He has authored over 50 publications, holds five patents, and co authored a Springer Verlag book on III V optical microresonators. He has also served as Chair of the IRPS Packaging & 2.5/3D Assembly Committee.
Rohit Grover
Advanced Micro Devices
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