Reliability Experts Forum

Dr. Chandra Mouli 

Emerging Memory Reliability Panel

Chandra Mouli is with Micron Technology Inc., Boise, ID, USA, where he is currently Vice President, Device Technology R&D with responsibilities in the areas of device characterization, reliability analysis, compact models, test structure design, process & device modeling for all technologies under development in R&D. He is also responsible for external research engagements, including IMEC, where he is in their strategic advisory board. He graduated from University of Texas at Austin with a PhD in EE and from Indian Institute of Science (IISc) with MSEE. His interests include semiconductor devices and process technology for advanced memory, opto-electronic devices, exploratory research in new materials and device structures. He has ~600 issued patents and several pending in various areas of semiconductor devices and process – in advanced memory, novel exploratory devices, image sensors, high speed interconnects and related technologies. He has served in the technical committees for various conferences, including IEDM, IRPS, SISPAD and in NSF, SRC review committees and has been in the editorial board for IEEE Electron Device Letters (EDL).

Dr. Alessandro Grossi 

Emerging Memory Reliability Panel

Dr. Alessandro Grossi received M.Sc. and Ph.D. degrees in electronic engineering from Università degli Studi di Ferrara in 2013 and 2017. During his Ph.D. has been involved in R&D activities on several NVM technologies, such as NAND Flash, MRAM and RRAM. He was visiting researcher at IHP in 2015 and CEA-LETI in 2016 working on RRAM and MRAM. In 2017, he joined CEA-LETI as researcher working with Stanford University on RRAM-based TCAM. He joined Infineon in 2018, where his R&D activities currently focus on embedded NVM characterization and validation for automotive microcontrollers. He authored/co-authored 30+ publications on NVM characterization, physics, modeling, and reliability.

Prof. Biswajit Ray

Emerging Memory Reliability Panel

Biswajit Ray is an Associate Professor of Electrical and Computer Engineering at Colorado State University, where he leads the Reliable and Assured Microelectronics (RAM) Laboratory. Dr. Ray earned his Ph.D. from Purdue University in West Lafayette, IN, and subsequently worked at SanDisk Corporation in Milpitas, California, contributing to the development of 3D NAND Flash memory technology. Dr. Ray’s research interests encompass electronic devices and systems, with a specific focus on enhancing the security, reliability, non-volatility, and energy efficiency of solid-state storage systems. He holds 40 U.S. issued patents and has authored over 90 research papers published in international journals and conferences. Prof. Ray is the recipient of the NSF CAREER Award (2022), the Best Poster Award at IEEE PAINE (2022) and NSF EPSCoR Research Fellowship (2020).

Prof. Sayani Majumdar 

Emerging Memory Reliability Panel

Dr. Sayani Majumdar is an Associate Professor of Electrical Engineering at the Faculty of Information Technologies and Communication Sciences at Tampere University, Finland. She also serves as a Steering committee member of the System-on-Chip (SoC) hub at Tampere University and as visiting professor at the Miin Wu School of Computing at National Cheng Kung University, Taiwan. Her career in semiconductor device research spans more than two decades where she worked in both academia and in close collaboration with the industry. She worked on several emerging technologies including spintronics and charge-based memories in world-leading organizations including MIT, USA and Max-Planck Institute, Germany. Her team’s current research focuses on the development of non-volatile memory and neuromorphic computing hardware using low-thermal budget ferroelectric materials and processes for their back-end-of-line integration with CMOS circuits, neuromorphic architectures and their application in extreme edge devices.

Dr. Fred Mancoff  

Emerging Memory Reliability Panel

Dr. Fred Mancoff is currently at Everspin Technologies as a Distinguished Member of the Technical Staff working on electrical characterization of spin-transfer torque (STT) magnetoresistive random access memory (MRAM), including reliability measurements on product level arrays of magnetic tunnel junctions. He completed his Ph.D. in Materials Science and Engineering from Stanford University in the area of magnetic thin films and a postdoc at NIST-Boulder investigating spin-torque switching in nanomagnets. He next joined the MRAM group at Motorola Labs in Phoenix, Arizona. His work at Motorola Labs, which continued through the labs’ transition to Freescale Semiconductor, focused on spin-transfer torque both for inducing GHz oscillations in nanomagnets as well as for switching in STT-MRAM. He transitioned with the Freescale MRAM group to the start-up Everspin Technologies where he has worked in magnetic device physics and testing with the team that created the first commercial spin-torque MRAM product in 2015, a 64Mb using in-plane MTJs, followed by perpendicular MTJ products up to 1Gb for a range of applications.

Dr. Milan D. Pešić 

Emerging Memory Reliability Panel

Milan D. Pešić received a M.Sc. and Ph.D. Electrical Engineering from the Technical University of Dresden, Germany. He is currently Director of Device Pathfinding at Applied Materials Inc, Santa Clara USA. He is leading a device pathfinding and overseeing device and cell physics and research activities in the field of advanced logic, (emerging) (non)volatile memories and devices. Previously, he was with MDLSoft Inc., Santa Clara, USA, Ferroelectric Memory Company, Dresden, and NaMLab, Dresden. Up to now, he has given 14 invited talks at major electron-devices conferences (IEDM, IRPS, etc.) and (co)authored over 90 technical papers, five book chapters, and filed over 30 US patents.