SiO2 as a gate dielectric for SiC MOSFETs : Interface and Dielectric Lifetime

The gate dielectric of SiC MOSFETs is still considered by many to be a major reliability concern. In this talk we will discuss the state-of-the art of SiO2 as a gate dielectric for SiC power MOSFETs, both for planar and trench devices. Focus is the dielectric/semiconductor interface and on the gate dielectric long-time reliability under TDDB stress. 

The electrical characterization of the interface traps is explored by uf-BTI (bias temperature instability) measurements over a wide temperature interval (-55oC+175oC) and with over 9 decades of stress and recovery time. In addition, the insights but also limitations from charge pumping to study these traps will be covered. Attempts for physical identification of the interface states through electrically detected magnetic resonance (EDMR) will be provided.

The intrinsic gate oxide reliability (under TDDB stress) and lifetime modeling is discussed including a comparison of SiC/SiO2 to Si/SiO2

Biography

Peter Moens received a Master in nuclear physics and a Ph.D. in solid state physics from the University of Gent, Belgium, in 1990 and 1993 respectively. At onsemi is working on SiC MOSFETs. He is/was a member of the technical program committees of IEDM, ISPSD, IRPS, CSMANTECH, ICSCRM, IRW, EDTM, ESSDERC and ESREF. He was the General chair of ISPSD 2012. He authored and co-authored over 200 publications in peer reviewed journals or conferences, 20 invited papers, and is the recipient of 6 best paper awards (including 2 ISPSD best paper awards as first author). He presented tutorials at IRPS, ISPSD and EDTM. He is an inductee of the ISPSD International Hall of Fame. He holds 62 US patents

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